이름 : Heidi
이메일 : heidisilvestri@bigpond.com
연락처 :
예식일 : Rs485 Cable - It Never Ends, Except...
문의내용:

This is an extra single bit appended to the end of each byte or character transmitted, which is set or cleared as necessary to ensure that the total number of '1' bits in the byte is always odd or even. If PT is set, all transmitted bytes with a parity bit will have an odd number of total '1' bits. If PT is cleared, then all transmitted bytes with a parity bit will have an even number of total '1' bits. In either of these cases, a source of noise that caused one bit to be received incorrectly would invalidate the received byte, since the total number of '1' bits would be odd rather than even. The M bit, with mask 0x10, determines whether eight or nine bits total are transmitted with each byte, regardless of whether or not the most-significant bit is a parity bit. The above parity settings will also determine how incoming data is interpreted (whether the most significant bit is considered a parity bit or part of the data being transmitted, and how many bits total to expect in each byte). RS485 uses the same differential signaling scheme as RS422, and hence has the same superior signal-to-noise characteristics and range described above.

Enabling RS485 on the Serial2 port is parallel to the process described above. InitRS485() configures Port D to ensure that bit 5 is an output. A jumper labeled "2 485En" (J7) enables RS485 operation on the Serial2 port if the jumper cap is installed, and configures Serial2 for RS232 operation if the jumper cap is not installed. For Serial2 RS485 operation: Install the jumper shunt onto "2 485En" (J7). For Serial2 RS232 operation: Remove the jumper shunt from "2 485En" (J7). Resistive termination - If the PDQ Board is at the end of the RS485 cable you can terminate the cable by installing jumper caps at both jumper locations, "Term" and "RTerm". To do that, install a jumper cap at "Term" only. Not only that, it can also be used to know if there is water in any place or not; for example, positioned appropriately, it can be used to know if a tank or a drinking trough is full or empty, or if a well has reached a certain level (eg to stop pumping water).

Each of the two UARTs on the wildcard is capable of full-duplex communications, meaning that both transmission and reception can occur simultaneously (although the RS485 protocol is half duplex as explained below). This section describes the QED-Forth routines that control the RS485 transceiver, and presents some ideas that may prove useful in designing a multi-drop data exchange protocol. RS485 multi-drop networks are daisy-chained networks with a single cable connecting multiple devices. In the most common multi-drop RS485 protocol, one computer is designated as a master and the rest of the computers or devices on the serial bus are designated as slaves. Because we chose the default baud rate (which the terminal is presumably already set for), you can simply move the serial cable from the Serial Port 1 connector to the Serial Port 2 connector on the Docking Panel to complete the change to the new port. In this case, cable connections may be made to Serial 2 on either the 10-pin PDQ Board Serial Communications Header, or the Docking Panel’s 10-pin right-angle Serial Header, or the Docking Panel’s Serial2 DB-9 Connector. By default, the RS485 connections are not brought out to the Docking Panel’s DB-9 Serial1 Connector.

The Serial1 and Serial2 ports are is supported by the HCS12's dual on-chip hardware UARTs, and do not require interrupts to work properly. Hardware is interfaced to the SPI via three PORTD pins named SCK, MOSI, and MISO brought out to pins 7, 8, and 10 on the Wildcard Port Header (see Appendix B). Slave devices use the master in/slave out pin, MISO, for transmitting, and the master out/slave in pin, MOSI, for receiving data. The master and slave could even exchange ascii QED-Forth commands. If your application requires communicating with a device that expects to receive a parity bit, the generation of a parity bit and selection of even or odd parity, and whether there are seven or eight data bits in each byte, is performed by setting or clearing bits in the configuration registers SCI0CR1 for Serial1 and SCI1CR1 for Serial2. When PE is set (equal to one), the most-significant bit in each byte transmitted will be a parity bit that is either set or cleared by the serial port automatically in order to achieve even or odd parity.